The present invention relates to a semiconductor photodetector and a process for producing the same. More particularly, the invention relates to a semiconductor photodetector implemented with a single SIT (Static Induction Transistor) or an array of SITs, and a process for producing the same.
A semiconductor imaging device using single-SIT pixels having both light detecting and switching capabilities has recently been developed by the present inventors. (See Japanese Patent Application Nos. 204656/81, filed Dec. 17, 1981, and 157693/82, filed Sept. 9, 1982.) A cross section of an SIT used in such an imaging device is shown in FIG. 1. This device includes an n.sup.+ type Si substrate 1 having thereon an n.sup.- type epitaxial layer 2 in which are formed an n.sup.+ type drain region 3, a p.sup.+ type control gate region 4, and a p.sup.+ type shielding gate region 5. The p.sup.+ shielding gate region 5, which is formed around the n.sup.+ drain region 3 and p.sup.+ control gate region 4, serves to isolate two adjacent SIT pixels by a depletion layer. The n.sup.+ substrate 1 provides a source region common to all pixels. The n.sup.+ drain region 3 is connected to a drain electrode 8, the source region 1 to a source electrode 10, and the control gate region 4 to a control gate electrode 9 through a gate capacitor made of a gate insulating layer 7.
The equivalent circuit of the device of FIG. 1 is shown in FIG. 2, wherein a vertical SIT 20 and a gate capacitor 21 are formed within electrodes 8, 9 and 10. The source electrode 10 is grounded, the control gate electrode 9 is supplied with a readout pulse signal .phi..sub.G, and the drain electrode 8 is connected to a biasing circuit 23 and a readout terminal 24 through a switch 22 that turns on in response to pulses of a video line selecting signal .phi..sub.S.
When the SIT pixel is biased and illuminated with light, an equal number of electrons and holes are formed in the neighborhood of the control gate electrode 4. The electrons enter the source electrode 10 where they are collected, whereas the holes accumulate in the control gate electrode 4, which floats with respect to d.c. current flowing through the gate capacitor 21. When a positive gate pulse of the signal .phi..sub.G is applied through gate capacitor 21, the barrier potential of the true gate is lowered sufficiently to allow current to flow into the SIT 20. The magnitude of the current flowing depends on the density of holes accumulated in the control gate 4, and ultimately by the amount of light received by the SIT pixel. The current is read out via terminal 24 as a video signal. As mentioned above, the function of the p.sup.+ shielding gate region 5 is to statically isolate two adjacent SIT pixels having the configuration described above. Needless to say, n.sup.+ region 3 may form a source region whereas n.sup.+ region 1 forms a drain region.
An imaging device composed of an array of such SITs connected by the common shielding gate region is capable of performing light detection and switching for signal readout. This device can be fabricated easily and permits a very high packaging density as compared with the conventional imaging device using a separate light-detecting diode and MOS switching transistor. As a further advantage, an imaging device composed of an array of SITs connected by a common shielding gate region achieves an extremely high detection sensitivity for light, and hence is free from switching noise inherent in MOS transistors.
The imaging device described in Japanese Patent Application Nos. 204656/81 and 157693/82 includes a matrix of SITs connected by a common shielding gate region, but it will be easily understood by those skilled in the art that a plurality of SITs may be arranged one-dimensionally (in a line) rather than two-dimensionally (in a matrix). Of course, an individual SIT unit can be used as a photoelectric converter. Therefore, the term "photodetector" as used in this specification means both an imaging device having a matrix or one-dimensional arrangement of SITs connected by a common shielding gate region, and a single-unit photoelectric converter formed of a single SIT.
A photodetector using an SIT having both light-detecting and switching capabilities has a great potential for use as a substitute for the conventional MOS type photodetector. As already mentioned, in an imaging device having an array of SITs, each SIT is isolated by a p.sup.+ shielding gate region 5. If isolation by the shielding gate 5 is not adequate, part of the photocarriers generated in the channel region of each SIT leak into an adjacent SIT pixel. This means two adjacent SIT pixels interfere with each other, resulting in undesired effects such as reduced image sharpness. Another disadvantage resulting from insufficient isolation of adjacent SIT pixels by the shielding gate region 5 is that blooming can easily occur due to excess photocarriers generated in the control gate region 4 when the latter is illuminated with intense light. Sufficient isolation between SIT pixels can be achieved by providing the shielding gate region 5 with a sufficient width, but then the packing density of SIT pixels is accordingly reduced.
As shown in Japanese Patent Application No. 157693/82, an SIT having an increased sensitivity to light can be obtained by locating the n.sup.+ drain region 3 closer to the shielding gate region 5. From a practical viewpoint though, the shielding gate region 5 should be electrically isolated from the drain region 3. However, if the drain region 3 is brought close to the shielding gate region 5 in an attempt to increase the light sensitivity of SIT, the two regions become insufficiently isolated and a fairly large junction capacitance is formed between them. Furthermore, if misalignment occurs in the fabrication process, the closely spaced drain region 3 and shielding gate region 5 may be short circuited, or nearly so.
A photodetector having SITs in the configuration shown in FIG. 1 has the disadvantage of insufficient isolation between SIT pixels by the p.sup.+ shielding gate region 5. This problem becomes prominent when the n.sup.+ drain region 3 is brought close to the shielding gate region 5 in order to provide a higher sensitivity to light.
Therefore, one object of the present invention is to provide a SIT photodetector having a shielding gate region capable of sufficient isolation of pixels to thus minimize interference between SIT pixels and to minimize blooming.
Another object of the present invention is to provide an SIT photodetector wherein the shielding gate region is adequately isolated from the drain (or source) region so that only a small junction capacitance is formed between the two regions and misalignment during fabrication will not cause the two regions to be short circuited easily.
A further object of the present invention is to provide a process for fabricating an SIT photodetector having the characteristics described above.